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PLDI 2021
Sun 20 - Sat 26 June 2021 Virtual Conference
Jianyi Cheng

Registered user since Thu 6 Aug 2020

Name: Jianyi Cheng

Bio: I am a Ph.D. candidate in the Circuits and Systems (CAS) group at Imperial College London. My research aims to produce smaller and faster hardware using formal methods. My current work is mainly focused on high-level synthesis (HLS) tool optimisation. My research interests include hardware programming, static analysis, formal verification and probabilistic programming.

Country: United Kingdom

Affiliation: Imperial College London

Personal website: https://jianyicheng.github.io

Research interests: Hardware programming, Static analysis, Formal Verification, Probabilistic Programming


PLDI 2021 Committee Member in Artifact Evaluation Committee within the Research Artifacts-track
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